1. Field of the Invention
The present invention relates to a test key structure. More particularly, the present invention relates to a test key structure that tests the influence of spacers upon the entire device.
2. Description of the Related Art
To increase the yield of a product, most semiconductor manufacturers will design test keys in various parts of the device before carrying out a mass production so that any unexpected errors resulting from the fabrication process can be discovered and the faulty part can be dealt with or improved.
FIG. 1 is a top view of a conventional test key structure and FIG. 2 is a cross-sectional view along line II-II of FIG. 1. As shown in FIGS. 1 and 2, the test key structure used for testing a lightly doped drain (LDD) region comprises a substrate 100, a lightly doped drain region 102, a source and a drain region 104 and a plurality of contacts 106a and 106b. In general, a self-aligned silicide block layer 108 is formed over the lightly doped drain region 102. Furthermore, a self-aligned silicide layer 110 is formed over the source and the drain region 104. The lightly doped drain region 102 is disposed between the source and the drain region 104. The contacts 106a and 106b are electrically connected to the source region and the drain region 104 on each side of the lightly doped drain region 102 respectively.
However, as shown in FIGS. 1 and 2, the conventional test key does not incorporate a polysilicon gate and spacers, which are commonly found inside a semiconductor device, into the structural design consideration. Thus, it is difficult to determine the influence of the spacers on the entire device. For example, it is difficult to assess the problem of an out-diffusion of dopants from a lightly doped junction interface due to the heat generated by spacer deposition. With the continuous miniaturization of semiconductor devices, the influence of the spacers can no longer be ignored.